Silicon Dreams: Semiconductors and ISM 2.0

A semiconductor is a material whose electrical conductivity lies between that of a conductor like copper and an insulator like glass, and which can be precisely controlled. This controllable conductivity is what makes the transistor, and therefore every modern chip, possible. Because chips power everything from mobile phones and cars to missiles and artificial intelligence systems, the ability to design and manufacture semiconductors has become a measure of technological sovereignty, which is why India launched the India Semiconductor Mission in December 2021 and moved it into a deeper second phase in the Union Budget 2026-27.

From sand to chip: how semiconductors work

The workhorse material is silicon, refined from sand and the second most abundant element in the Earth's crust. Pure silicon is a poor conductor, but doping, the deliberate addition of tiny amounts of impurities, creates n-type material (with extra electrons) and p-type material (with electron vacancies called holes). A transistor is a microscopic switch built from these doped regions; it is the on-off building block of all digital electronics. An integrated circuit, or chip, packs billions of transistors onto a sliver of silicon. The factory that prints these circuits is called a fab (fabrication plant), and the fineness of its printing is measured by the process node in nanometres: a 3-nanometre node packs far more transistors than a 28-nanometre one, giving more computing power in less space and energy.

Making a chip is only half the value chain. OSAT, or Outsourced Semiconductor Assembly and Test, and ATMP, Assembly, Testing, Marking and Packaging, cover cutting the silicon wafer into dies, packaging them and testing them, which is less complex than fabrication and a faster entry point into the industry. Beyond silicon, compound semiconductors such as gallium nitride and silicon carbide, and wide-bandgap semiconductors more generally, handle high voltages and temperatures better than silicon, making them essential for electric vehicles, power electronics, solar inverters and fast chargers.

The global chip order

Chipmaking is the most concentrated industry on earth. Taiwan's TSMC makes most of the world's advanced logic chips, South Korea's Samsung leads in memory, the United States dominates chip design and equipment, the Netherlands' ASML is the sole supplier of extreme-ultraviolet lithography machines that print the finest circuits, and Japan supplies critical materials. The COVID-19 shortages and US-China technology tensions exposed how this concentration creates supply chain vulnerability for every chip-importing country. India, whose semiconductor market was worth about $45-50 billion in 2024-25 and is projected to reach $100-110 billion by 2030, imports nearly all its chips, which is the strategic case for building domestic capacity.

Pax Silica is a United States-led coalition for secure supply chains across the silicon stack, spanning semiconductors, artificial intelligence and critical minerals. India joined it on 20 February 2026 at the India AI Impact Summit in New Delhi. For UPSC, it is the diplomatic counterpart of the industrial push: India is placing its semiconductor bet inside a trusted-partners architecture rather than going it alone.

ISM 1.0: building the foundation

The India Semiconductor Mission (ISM) 1.0 was approved by the Union Cabinet in December 2021 with an incentive framework of ₹76,000 crore, offering fiscal support of up to 50 per cent of project cost. The Ministry of Electronics and Information Technology (MeitY) is the nodal ministry. It works through four schemes: the Semiconductor Fabs Scheme for silicon fabrication units; the Display Fabs Scheme for display manufacturing; support for ATMP and OSAT units; and the Design Linked Incentive (DLI) Scheme, which encourages Indian companies and start-ups to design chips and build semiconductor intellectual property.

By December 2025, ten projects with cumulative investments of about ₹1.60 lakh crore had been approved across six states, rising to twelve projects worth about ₹1.64 lakh crore by September 2026. The headline projects include Micron Technology's $2.75 billion ATMP facility at Sanand in Gujarat, announced in June 2023, and the Tata Electronics semiconductor fab at Dholera in Gujarat in technology partnership with Taiwan's Powerchip Semiconductor Manufacturing Corporation (PSMC), cleared at ₹91,000 crore; Tata Semiconductor Assembly and Test's ₹27,000 crore assembly and testing plant at Jagiroad in Assam; and the CG Power-Renesas Electronics ₹7,600 crore OSAT facility at Sanand in Gujarat. On the design side, support has reached 315 academic institutions and over 100 start-ups, electronic design automation tools have been made available in 315 institutions, and the Chips to Startups initiative is working toward a five-year target of training 85,000 semiconductor engineers.

Approved units at a glance. The Semicon 1.0 approvals mix one full fabrication plant with a cluster of assembly, testing and packaging units, most of them in Gujarat, as this table summarises.

ISM 2.0: from creation to deepening

The India Semiconductor Mission 2.0 was announced by Finance Minister Nirmala Sitharaman in the Union Budget 2026-27, with a provision of ₹1,000 crore for the financial year 2026-27. Where ISM 1.0 created the ecosystem, ISM 2.0 seeks to deepen it. Approved by the Union Cabinet in July 2026 with an outlay of ₹1,27,500 crore spread over twelve years and formally launched at SEMICON India in September 2026, its focus areas are producing semiconductor equipment and materials in India, designing full-stack Indian semiconductor intellectual property, strengthening domestic and global supply chains, and creating industry-led research and training centres to convert research into deployable technology. The scheme rests on six pillars, design, machines and materials, fabs, advanced packaging, research and development, and talent, with targets of 200 design startups and one lakh technicians trained within five years. Semiconductor training is to expand from 315 to 500 academic institutions, and the future roadmap emphasises advanced packaging, compound semiconductors, wide-bandgap materials and AI-native chip design.

ISM 2.0 is complemented by the Electronics Component Manufacturing Scheme (ECMS), launched in April 2025 with an outlay of ₹22,919 crore to build the components base around chipmaking, whose outlay the Budget proposed to raise to ₹40,000 crore after investment commitments came in at double the target. Together, the two schemes link chip fabrication with the wider electronics manufacturing push under Make in India.

NITI Aayog's 10-year roadmap

In May 2026, NITI Aayog released India's first comprehensive ten-year semiconductor roadmap, titled Future of India's Semiconductor Industry. It reinforces ISM 2.0's priorities and marks a shift from attracting investments to building deeper capabilities. The roadmap rests on five pillars: pioneering frontier research and design intellectual property; policy and investment to mobilise long-horizon capital; production focused on advanced packaging and compound semiconductors; people across the full semiconductor talent pyramid; and partnerships with trusted nations and global industry. Its stated targets are a USD 120 to 150 billion semiconductor value chain by 2035, 35 to 50 per cent self-sufficiency, a place among the world's top three OSAT and packaging destinations, and more than one hundred indigenous semiconductor design intellectual properties. Production follows a More-than-Moore strategy focused on advanced packaging and compound semiconductors rather than the leading-edge node race.

The economics of a fab

A modern fab costs tens of thousands of crores to build and takes years to reach profitable yields, which is why only a handful of companies worldwide attempt leading-edge fabrication. Beyond money, a fab is an infrastructure project: it needs vast quantities of ultra-pure water, uninterrupted high-quality power, vibration-free buildings, and a flawless supply chain of specialty gases, chemicals and wafers. This is why semiconductor clusters matter more than isolated plants, and why the way forward emphasises clusters with assured power, water, logistics, housing and environmental safeguards.

India's entry strategy reflects this economics. ATMP and OSAT units are less capital-intensive than fabs and let India enter the value chain faster, which is why the first wave of approvals includes several such units alongside the Tata-PSMC fab. Chip design, where India already has deep talent, needs far less capital and is supported through the DLI Scheme. The realistic path is therefore design and packaging first, fabrication next, and materials and equipment as the deepening phase under ISM 2.0.

SPECS, the US CHIPS Act and supply chains

The India Semiconductor Mission does not operate in a vacuum. Every major economy is now running its own version of the same playbook, treating chips as strategic infrastructure rather than ordinary industry. India's first lesson came from an earlier scheme, SPECS, the Scheme for Promotion of Manufacturing of Electronic Components and Semiconductors. Notified in April 2020 by the Ministry of Electronics and Information Technology, SPECS offered a financial incentive of 25 per cent of capital expenditure, paid on reimbursement basis, for manufacturing electronic components, semiconductor and display fabrication units, ATMP units and specialised sub-assemblies, within a total scheme cost of about Rs 3,285 crore. The stated purpose was to offset the disabilities of domestic manufacturing, costlier power, finance and logistics, and to push India from pure assembly into higher-value component manufacturing.

SPECS was the bridge to the ISM. Its modest scale taught planners that small incentives could attract component units but not fabs, which is why the ISM later offered fiscal support of up to 50 per cent of project cost. Its successor arrived in May 2025: the Electronics Components Manufacturing Scheme (ECMS), approved with a far larger outlay of Rs 22,919 crore. The message of that upgrade is that component depth, the unglamorous middle of the value chain between silicon and the finished gadget, is where India's real deficit lies.

The loudest version of the playbook is the CHIPS and Science Act of the United States, signed in August 2022. It is a US federal law committing about $52.7 billion to domestic semiconductor research, development, manufacturing and workforce development, including $39 billion in manufacturing incentives, about $13.2 billion for research and workforce, and $500 million for supply-chain security, alongside a 25 per cent investment tax credit on semiconductor manufacturing capital expenditure. Its goals are explicit: reshoring, the strategy of bringing critical production back onto domestic soil, tens of thousands of manufacturing jobs, and denying a strategic rival the advanced chips that power artificial intelligence and modern weapons.

The Act's subsidies come wrapped in export controls, government restrictions on selling specified goods and technologies to designated destinations. In October 2022 the US Commerce Department's Bureau of Industry and Security imposed sweeping controls cutting China off from advanced computing chips and the equipment used to make them, tightened repeatedly since, while the Act's own guardrails bar funding recipients from expanding advanced chip manufacturing in countries of concern. For India this cuts both ways. On one side, supply-chain realignment, the rerouting of production and sourcing away from geopolitical risk, pushes multinationals toward friend-shoring, locating sensitive production in trusted partner countries, and India markets itself as that trusted alternative. On the other side, the same controls squeeze the global supply of lithography tools and design software that any Indian fab must import, since the equipment oligopoly sits in the United States, the Netherlands and Japan.

Chips carry a quieter dependency: rare earth elements, the group of seventeen chemically similar metals, including neodymium, dysprosium, terbium and yttrium, that are essential in small quantities for semiconductors, magnets, lasers and displays. China controls roughly six-tenths of global mining and about nine-tenths of refining capacity, and it has weaponised that position, placing gallium and germanium under export licensing in 2023 and tightening rare-earth magnet controls in 2025. India holds about six per cent of global reserves, mainly monazite sands along its coasts, but contributes only about one per cent of supply for want of separation and refining capacity. The policy answer so far is the identification of thirty critical minerals in 2023 and a National Critical Mineral Mission to build domestic exploration, processing and recycling capacity, though closing the refining gap will take years of patient investment.

One more scheme completes the electronics-industrial picture: the PLI scheme for Advanced Chemistry Cell batteries, formally the National Programme on Advanced Chemistry Cell Battery Storage. Approved in May 2021 with an outlay of Rs 18,100 crore, it targets 50 GWh of domestic ACC manufacturing capacity. An Advanced Chemistry Cell is a modern high-energy-density battery cell, typically lithium-ion based, designed for electric vehicles and grid-scale energy storage. Batteries are the missing middle of India's energy transition: without domestic cells, every electric vehicle and every solar-plus-storage project stays hostage to imported cells. About 40 GWh has been awarded to beneficiary firms so far, and the scheme's real test is whether gigafactories localise not just assembly but the cathode, anode and electrolyte supply chains behind the cell.

Challenges and the way forward

The challenges are formidable. India has limited experience in advanced fabrication, especially at cutting-edge nodes, and remains dependent on imported equipment, ultra-pure chemicals, specialty gases, wafers and photolithography machines. A fab needs enormous quantities of ultra-pure water and uninterrupted power, plus flawless logistics. Capital costs run into tens of thousands of crores with long gestation periods, commercial viability depends on global demand cycles, and India faces entrenched competition from Taiwan, South Korea, China, Japan, the United States and the European Union. Talent is strong in chip design but thin in fabrication, packaging, materials and process engineering.

The way forward is to build a complete ecosystem rather than chasing only flagship fabs: link ISM 2.0 with ECMS, production-linked incentive schemes and defence manufacturing; prioritise areas where India can build early strength, such as chip design, advanced packaging, OSAT, compound semiconductors and power electronics; develop indigenous capacity in materials, gases, wafers and equipment components; and create semiconductor clusters with assured power, water, logistics and environmental safeguards.

What is a fab?

A fab, short for fabrication plant, is the factory where integrated circuits are printed onto silicon wafers using photolithography. Fabs are among the most capital-intensive and technologically complex factories in the world, costing tens of thousands of crores.

What is the Design Linked Incentive Scheme?

The Design Linked Incentive Scheme is a component of the India Semiconductor Mission that supports Indian companies and start-ups in chip design. It provides financial support across design, development and deployment stages and access to electronic design automation tools, helping India move from chip consumer to chip creator.

Why can India not simply keep importing chips?

Import dependence creates strategic vulnerability: supply can be disrupted by pandemics, geopolitics or export controls, as the COVID-19 chip shortage showed. Chips are also critical for defence and secure communications, where dependence on foreign suppliers is a security risk. Domestic capacity buys resilience and bargaining power.

What do 3-nanometre and 2-nanometre nodes mean?

The nanometre figure describes the fineness of transistor printing in a fab's process node. Smaller nodes pack more transistors into the same area, delivering more computing power with less energy. India's roadmap targets 3 nm and 2 nm capability by 2035, which is the current global frontier.

Key Terms

• semiconductor: A semiconductor is a material, typically silicon, whose electrical conductivity lies between that of a conductor and an insulator and can be precisely controlled, making it the basis of transistors and microchips. Semiconductors power everything from phones to defence systems, and their supply chains are a strategic concern. For UPSC they matter for technology, economy and geopolitics. Example: The Union Cabinet approved India's first chip fabrication plant by Tata Electronics and Taiwan's PSMC at Dholera, Gujarat, in February 2024.
• transistor: A transistor is a semiconductor device that can amplify or switch electronic signals, acting as the basic building block of all modern electronics. Invented at Bell Labs in 1947, it replaced bulky vacuum tubes and made miniaturisation possible. Billions of transistors are packed into each modern microprocessor, and shrinking their size, the trend known as Moore's law, drove decades of computing progress. Example: A modern smartphone chip contains tens of billions of transistors on a piece of silicon a few centimetres across.
• technological sovereignty: Technological sovereignty is a country's ability to develop, control, and secure the critical technologies its economy and security depend on, without being hostage to foreign suppliers or export controls. For India it means building domestic capacity in semiconductors, telecom equipment, defence systems, and digital infrastructure rather than relying entirely on imports. It is distinct from autarky: the goal is strategic autonomy and resilient supply chains, not cutting off trade. Example: The Semicon India Programme, which supports domestic chip fabrication and assembly plants, is framed as a step toward technological sovereignty in electronics.
• India Semiconductor Mission: The India Semiconductor Mission is the government's programme, approved in December 2021 with an outlay of 76,000 crore rupees, to build a domestic semiconductor and display ecosystem through fiscal incentives for fabs, display units and design-linked grants. It matters for UPSC because semiconductors link GS-3 topics on manufacturing, strategic technology, supply-chain resilience and Atmanirbhar Bharat. Example: The approved Tata-PSMC fab at Dholera, Gujarat, is cited as the mission's flagship step toward reducing India's near-total import dependence on chips.
• silicon: Silicon is a metalloid element, the second most abundant in Earth's crust, and the base material of the modern electronics industry because its conductivity can be precisely tuned by doping. Ultra-pure single crystals are sliced into wafers, which are then patterned with circuits to make chips and solar cells. Mastery of silicon processing is what made the digital age possible. Example: Every processor and memory chip in computers and mobile phones is built on a silicon wafer.
• Doping: Doping is the deliberate addition of impurities to a semiconductor to control its conductivity. It is the basis of n-type and p-type semiconductors and a staple of prelims questions on how chips are made.
• n-type: An n-type semiconductor is silicon that has been deliberately doped with a tiny amount of an element like phosphorus, which has five outer electrons instead of silicon's four. The extra electron from each dopant atom is free to move, so electric current in n-type material is carried mainly by negatively charged electrons (n for negative). Paired with p-type material, where current is carried by positive holes, it forms the p-n junctions at the heart of diodes, transistors and solar cells. Example: In a silicon solar cell, sunlight striking the n-type layer knocks electrons loose, and the junction with the p-type layer sweeps them into an electric current, which is how the panel generates power.
• p-type: In semiconductor physics, p-type (positive-type) material is silicon doped with atoms such as boron that have fewer valence electrons, creating mobile vacancies called holes that carry positive charge. Paired with n-type material, it forms the p-n junctions at the heart of diodes, transistors, LEDs, and solar cells. The movement of holes toward the junction is what enables current control in these devices. Example: The p-type layer in a solar cell, which pairs with the n-type layer to create the electric field that separates light-generated charges.
• integrated circuit: An integrated circuit, or chip, is a tiny electronic circuit in which thousands to billions of transistors, resistors and other components are fabricated together on a single piece of semiconductor material, usually silicon. By packing an entire circuit onto one chip, it made electronics small, cheap, reliable and energy efficient, enabling everything from computers and mobile phones to satellites. For UPSC, it is the heart of the digital economy and of India's semiconductor ambitions. Example: India's Semiconductor Mission is backing chip fabrication and packaging plants, such as the Tata-PSMC semiconductor fab announced at Dholera, Gujarat, so that the chips in phones, cars and defence equipment are made domestically rather than imported.
• fab: Short for fabrication plant, a highly controlled factory where semiconductor chips are manufactured. Inside ultra-clean cleanrooms, photolithography machines print circuit patterns onto silicon wafers layer by layer, in a process demanding extreme precision, vast quantities of ultrapure water and uninterrupted power. Fabs cost billions of dollars to build, which is why chip manufacturing is concentrated in a few countries and why fab incentives are central to industrial policy. Example: The Tata-PSMC semiconductor fab approved at Dholera, Gujarat, India's first commercial chip fabrication plant, aimed at 50,000 wafer starts per month.
• process node: A process node is the generation of semiconductor manufacturing technology, historically named after the transistor's smallest feature size in nanometres. Smaller nodes (7 nm, 5 nm, 3 nm and below) generally pack more transistors per chip, improving performance and energy efficiency. The label is now partly marketing, since different foundries measure it differently, but it remains the industry's shorthand for chipmaking progress. Example: TSMC's 3-nanometre node used for recent flagship smartphone processors, and India's Semicon India programme aiming to build domestic fabrication capacity.
• OSAT: Outsourced Semiconductor Assembly and Test is the back-end stage of chip manufacturing in which fabricated silicon wafers are diced into individual chips, packaged, and tested before sale. OSAT units are far less capital-intensive than wafer fabrication plants, so India is using them as an entry point into the semiconductor value chain under the Semicon India programme, alongside design and display manufacturing. Globally, most OSAT capacity is concentrated in Taiwan, China and Southeast Asia. Example: Proposed OSAT projects in India assemble and test chips for automotive and consumer electronics applications, building domestic back-end capacity.
• ATMP: Assembly, Testing, Marking and Packaging, the back-end segment of semiconductor manufacturing in which fabricated silicon wafers are cut into individual chips, assembled, tested and packaged for use in devices. It is also called OSAT (Outsourced Semiconductor Assembly and Test) when done by specialist firms. Example: India has approved ATMP/OSAT units, such as Tata's facility at Jagiroad in Assam, under the Semicon India programme to build a domestic chip-packaging base. Example: Tata's approved ATMP/OSAT unit at Jagiroad, Assam, under the Semicon India programme.
• compound semiconductors: Compound semiconductors are semiconducting materials made of two or more chemical elements, such as gallium arsenide, gallium nitride or silicon carbide. They offer higher electron mobility, efficiency and power handling than silicon, making them essential for LEDs, power electronics, 5G and defence systems. Example: Gallium nitride chips, a compound semiconductor, power efficient fast chargers and 5G base stations.
• wide-bandgap semiconductors: Wide-bandgap semiconductors are materials with a larger energy gap between their valence and conduction bands than silicon (about 3 electronvolts or more, compared with silicon's 1.1), which lets devices operate at higher voltages, temperatures, and frequencies with lower energy losses. Silicon carbide (SiC) and gallium nitride (GaN) are the leading examples, and they are used in power electronics, electric vehicle inverters, fast chargers, renewable-energy converters, and 5G base stations. They are central to the global push for more efficient electronics and energy systems. Example: Silicon carbide power modules in electric vehicles cut switching losses and extend driving range compared with conventional silicon chips.
• TSMC: TSMC, the Taiwan Semiconductor Manufacturing Company, is the world's largest dedicated semiconductor foundry, founded in 1987 by Morris Chang. It manufactures chips designed by other companies, including most of the world's advanced smartphone and AI processors, and its dominance makes Taiwan central to global chip supply chains. Example: The most advanced processors in flagship smartphones are fabricated by TSMC.
• Samsung: Samsung is the South Korean technology conglomerate whose semiconductor division is the world's largest maker of memory chips (DRAM and NAND flash) and a leading chip foundry. It illustrates the geographic concentration of the global chip industry: Taiwan's TSMC dominates advanced logic, Samsung leads in memory, and the US dominates chip design and equipment. Samsung's fabs anchor South Korea's position in the semiconductor supply chain. Example: Samsung's dominance of the global DRAM and NAND flash memory markets.
• ASML: The Dutch company that holds a near-monopoly on extreme ultraviolet (EUV) lithography machines, the equipment without which leading-edge chips (7 nm and below) cannot be manufactured. Headquartered in Veldhoven in the Netherlands, it is the critical bottleneck of the global semiconductor supply chain. Example: export controls on ASML's EUV machines to China are a central lever of technology geopolitics in the US-China chip rivalry. Example: Dutch firm whose EUV lithography machines are indispensable for making 7 nm and smaller chips.
• supply chain vulnerability: In the semiconductor context, supply chain vulnerability is the exposure of an industry to disruption because production is concentrated in a few geographies or firms. Chip manufacturing is highly concentrated, with the bulk of advanced fabrication in Taiwan, so any geopolitical crisis, natural disaster, or export control could choke global supply. India seeks to reduce this vulnerability by building domestic fabrication and packaging capacity under the Semicon India Programme. Example: The concentration of advanced chip fabrication in Taiwan means a single regional crisis could disrupt the global electronics and automobile industries.
• India Semiconductor Mission (ISM) 1.0: The India Semiconductor Mission (ISM) 1.0 is the first phase of India's national chip programme, approved by the Union Cabinet in December 2021 with an incentive framework of 76,000 crore rupees. Anchored by the Ministry of Electronics and Information Technology, it offers fiscal support of up to 50 per cent of project cost across four schemes covering fabrication, display, design and packaging. Example: The Tata-PSMC fab, cleared at 91,000 crore rupees, is the flagship fabrication project of the ISM 1.0 phase.
• Semiconductor Fabs Scheme: The Scheme for setting up of Semiconductor Fabs in India, part of the Rs 76,000 crore Semicon India programme implemented by the India Semiconductor Mission, offers fiscal support of 50 per cent of project cost on a pari passu basis for silicon CMOS wafer fabrication plants. It is designed to attract the very large investments that fabs need and to build a trusted domestic chip value chain. It sits alongside parallel schemes for display fabs, compound semiconductors and OSAT facilities. Example: Fiscal support of 50 per cent of project cost for a silicon CMOS fab under the Semicon India programme.
• Display Fabs Scheme: The Display Fabs Scheme, formally the Scheme for Setting up of Display Fabs in India, is the component of the Semicon India programme that incentivises domestic manufacturing of display panels. It offers fiscal support of up to 50 percent of the project cost to companies setting up TFT-LCD or AMOLED display fabrication plants in India. Alongside the semiconductor fab and DLI schemes, it targets India's heavy import dependence for the displays used in phones, TVs and laptops.
• Design Linked Incentive (DLI) Scheme: The Design Linked Incentive (DLI) Scheme is the semiconductor-design support programme under the Ministry of Electronics and Information Technology's Semicon India programme. It offers financial incentives and access to design infrastructure (chip-design software, IP cores and prototype fabrication) to Indian startups, MSMEs and companies engaged in semiconductor design and fabless chip development. The scheme targets the design end of the chip value chain, where India aims to convert its large pool of chip-design engineers into domestic product companies. Example: A startup designing chips for 5G equipment or electric vehicles can claim DLI support for its design costs and prototype fabrication.
• Micron Technology's: Refers to the US chipmaker Micron Technology's $2.75 billion (about Rs 22,540 crore) semiconductor assembly and test facility at Sanand, Gujarat, announced on 22 June 2023 with an MoU signed on 28 June 2023. Approved under the Modified ATMP Scheme with 50 per cent central and 20 per cent state fiscal support, it will assemble and test DRAM and NAND products and is expected to create about 5,000 direct jobs. Example: The Sanand plant, being built by Tata Projects, is India's first major semiconductor backend facility and the anchor project of the India Semiconductor Mission.
• Tata Electronics: Tata Electronics is the Tata group's electronics manufacturing arm. It is building India's first semiconductor fabrication plant at Dholera, Gujarat, in partnership with Taiwan's PSMC at an investment of about 91,000 crore rupees for mature nodes from 28nm to 90nm, alongside an outsourced semiconductor assembly and test (OSAT) facility in Assam worth about 27,000 crore rupees, under the India Semiconductor Mission. Example: Intel signed an MoU with Tata Electronics to explore manufacturing chips at its upcoming Dholera fab.
• Chips to Startups: The Chips to Startup (C2S) Programme is a capacity-building initiative launched in 2022 by the Ministry of Electronics and Information Technology to build India's semiconductor design ecosystem. Implemented by C-DAC at about 100 academic institutions and R&D organisations, it aims to train 85,000 engineers in VLSI and embedded system design over five years, and to support fabless startups, ASIC development, System-on-Chip prototypes and an IP core repository. It is the talent pipeline counterpart of India's semiconductor manufacturing push. Example: Student-designed chips fabricated through shared multi-project wafer runs at the Semiconductor Laboratory (SCL), Mohali, with EDA tool access via C-DAC's ChipIN Centre.
• India Semiconductor Mission 2.0: The India Semiconductor Mission 2.0 is the second phase of India's national chip programme, announced in the Union Budget 2026-27 with 1,000 crore rupees provided for 2026-27. It shifts from creating the ecosystem to deepening it, targeting indigenous semiconductor equipment and materials, full-stack Indian chip design, and large-scale talent development. Example: The Chips to Startups initiative under the mission targets training 85,000 semiconductor engineers over five years.
• equipment and materials: In the semiconductor context, this refers to the fabrication tools and input materials a chip industry needs: lithography and etching machines, deposition and testing equipment, plus inputs like silicon wafers, ultrapure gases, photoresists and specialty chemicals. A resilient chip ecosystem requires domestic capacity in equipment and materials, not just chip design or assembly, because the global supply of both is concentrated in a handful of countries and firms. Example: India's semiconductor programme targets manufacturing semiconductor equipment and materials domestically (backed by a dedicated budget allocation) so that upcoming fabs need not depend entirely on imported tools and inputs.
• full-stack Indian semiconductor intellectual property: The strategic goal that India should own the complete chip value chain in intellectual property, not just assembly or packaging: processor architectures, IP cores, chip designs and the associated design tools and verification expertise, developed by Indian firms and institutions. Full-stack IP means India can design, customise and commercialise chips for its own needs, from strategic and automotive applications to consumer electronics, rather than licensing foreign designs. It is a stated objective of India's semiconductor policy, alongside manufacturing equipment and materials and supply chain resilience. Example: SHAKTI, the open-source RISC-V processor family developed at IIT Madras, and VEGA, the indigenous microprocessor from C-DAC, are early examples of Indian semiconductor IP.
• industry-led research and training centres: Industry-led research and training centres are institutions set up and run by companies, often with government support, to convert laboratory research into deployable products and to train the skilled workforce an industry needs. Unlike purely academic labs, they focus on applied engineering, prototyping, and hands-on skilling aligned with industry demand. They are a key part of building domestic capability in strategic technology sectors. Example: Centres in India's semiconductor ecosystem that train engineers in chip design and fabrication, so that research moves from the lab to the factory.
• NITI Aayog: NITI Aayog is the Indian government's premier policy think tank, established on 1 January 2015 to replace the Planning Commission. Chaired by the Prime Minister with a Governing Council of all chief ministers, it promotes cooperative federalism, publishes indices like the SDG India Index, and runs programmes such as the Aspirational Districts Programme. It matters for UPSC because questions contrast its bottom-up, advisory role with the Planning Commission's top-down plan allocations. Example: NITI Aayog's SDG India Index, which scores states on sustainable development goals, is a favourite data point in governance answers.
• Future of India's Semiconductor Industry: Future of India's Semiconductor Industry is the title of India's ten-year semiconductor roadmap released by NITI Aayog, which sets the strategic direction for the country's chip ecosystem. It reinforces the priorities of the India Semiconductor Mission 2.0 and marks a shift from merely attracting investment to building deeper domestic capabilities across design, fabrication, packaging and talent. It is a key reference for UPSC questions on India's semiconductor push. Example: A practice question asks what the NITI Aayog roadmap Future of India's Semiconductor Industry envisages for chip manufacturing.
• semiconductor clusters: Semiconductor clusters are geographic concentrations of chip fabrication plants, assembly and testing units, design centres and supplier ecosystems in one region. Clustering matters because fabs need huge capital, skilled labour, reliable water and power, and close supply-chain proximity. India is building such clusters under the India Semiconductor Mission, which offers up to 50 percent fiscal support for projects, with approved units coming up in Gujarat, Assam, Uttar Pradesh and Odisha. Example: Tata's semiconductor fab at Dholera in Gujarat, built with Taiwan's PSMC, and its assembly and test unit at Jagiroad in Assam form a two-state cluster.
• DLI Scheme: The DLI Scheme (Design Linked Incentive Scheme) is the Semicon India programme's incentive package for Indian companies engaged in semiconductor design. It provides financial support and design infrastructure (chip-design software, IP cores and prototype fabrication access) to startups, MSMEs and domestic companies developing chips, chipsets, systems-on-chip and semiconductor-linked products. It complements the fab schemes, which subsidise manufacturing plants, by strengthening the design end of the value chain where India already has a large pool of engineers. Example: Indian startups designing chips for IoT devices or automotive electronics are the scheme's target beneficiaries.
• ISM 1.0: ISM 1.0 is the first phase of the India Semiconductor Mission, approved by the Union Cabinet in December 2021 with an incentive framework of 76,000 crore rupees offering fiscal support of up to 50 per cent of project cost. With the Ministry of Electronics and Information Technology as nodal ministry, it works through four schemes to attract chip fabrication, display, design and packaging investments to India. Example: The Tata-PSMC semiconductor fab, cleared at 91,000 crore rupees, is among the marquee projects of the ISM 1.0 phase.
• ISM 2.0: ISM 2.0 is the second phase of the India Semiconductor Mission, announced in the Union Budget 2026-27 with a provision of 1,000 crore rupees for 2026-27. Where ISM 1.0 created the semiconductor ecosystem, ISM 2.0 seeks to deepen it, focusing on producing semiconductor equipment and materials in India, full-stack Indian chip design, and talent development. Example: The Chips to Startups initiative under the mission works toward a five-year target of training 85,000 semiconductor engineers.
• transistors: Transistors are semiconductor switches that amplify and control electric current, and they are the fundamental building blocks of digital electronics. Every logic gate in a processor is built from transistors, so a chip's performance and power efficiency scale with how many transistors it holds and how small they are. The global race in semiconductors is largely a race to pack more transistors into each chip. Example: Modern flagship processors contain tens of billions of transistors, each only a few nanometres wide.
• NITI Aayog's 10-year roadmap: A ten-year roadmap titled Future of India's Semiconductor Industry, released by NITI Aayog's Frontier Tech Hub in May 2026, that targets a USD 120 to 150 billion domestic semiconductor value chain by 2035, 10 to 13 per cent of the global market, 35 to 50 per cent chip self-sufficiency by 2035, a top-three global position in chip packaging (OSAT) and over 100 advanced semiconductor design IPs, following a More-than-Moore strategy. Example: The roadmap aims for India to export chips to more than 50 countries by 2035 while raising value-chain self-sufficiency towards 55 to 70 per cent.
• Ministry of Electronics and Information Technology: The Ministry of Electronics and Information Technology is the Union ministry in charge of India's digital and electronics ecosystem, covering IT policy, digital infrastructure, electronics manufacturing, semiconductors, and cybersecurity coordination. It administers flagship programmes such as Digital India and the India Semiconductor Mission, and oversees agencies like CERT-In. It took its current form in 2016. Example: It administers the India Semiconductor Mission's incentive schemes for chip fabrication and design-linked projects.
• Powerchip Semiconductor Manufacturing Corporation (PSMC): Powerchip Semiconductor Manufacturing Corporation is a Taiwanese chip foundry and the technology partner for India's first commercial semiconductor fab, being built by Tata Electronics at Dholera, Gujarat, with about Rs 91,000 crore in investment. Under the partnership PSMC provides process technology, fab construction support and training for mature nodes such as 28, 55 and 90 nanometres. Example: The Dholera fab will use PSMC's technology to make power-management chips, display drivers and microcontrollers for automotive and electronics markets, with first chips expected by late 2026.
• Tata Semiconductor Assembly and Test: Tata Semiconductor Assembly and Test Pvt Ltd is setting up India's first indigenous greenfield outsourced semiconductor assembly, test and packaging (OSAT) facility at Jagiroad in Morigaon district, Assam, on the former Nagaon paper mill site, with an outlay of about Rs 27,000 crore and a planned capacity of 48 million packaged chips per day. Cleared under the India Semiconductor Mission in 2024, it uses wire-bond, flip-chip and integrated system packaging technologies and is expected to generate around 27,000 direct and indirect jobs. Example: Trial production began in September 2026, with commercial operations expected by December 2026 or January 2027.
• CG Power-Renesas Electronics: CG Power-Renesas Electronics is the joint venture (led by CG Power of the Murugappa Group, with Japan's Renesas Electronics and Thailand's Stars Microelectronics) building an outsourced semiconductor assembly and test (OSAT) facility in Sanand, Gujarat, under the India Semiconductor Mission. Approved by the Union Cabinet in February 2024 with an investment of about Rs 7,600 crore over five years, it is one of India's first chip assembly and packaging plants, and commercial production was inaugurated in July 2026. Example: The Sanand OSAT plant assembles, tests and packages chips for automotive, consumer, industrial and 5G applications, with a planned ramp-up capacity of 15 million units per day.
• Electronics Component Manufacturing Scheme (ECMS): The Electronics Component Manufacturing Scheme (ECMS) was approved by the Union Cabinet on 28 March 2025 and notified by the Ministry of Electronics and Information Technology on 8 April 2025 to build India's electronics component ecosystem. With a total outlay of Rs 22,919 crore over a six-year tenure (FY 2025-26 to FY 2031-32, including a one-year gestation period), it offers turnover-linked, capex-linked or hybrid incentives for making bare components (such as PCBs, capacitors and Li-ion cells), sub-assemblies (camera and display modules) and supply-chain materials. It targets Rs 59,350 crore of investment and over Rs 4.5 lakh crore of component production, complementing the India Semiconductor Mission by raising domestic value addition. Example: The first batch of 7 projects worth Rs 5,532 crore approved under ECMS in October 2025 will meet about 20 percent of India's domestic PCB demand.
• SPECS: SPECS is the Scheme for Promotion of Manufacturing of Electronic Components and Semiconductors, notified in April 2020 by the Ministry of Electronics and Information Technology. It offered a financial incentive of 25 per cent of capital expenditure, on reimbursement basis, for manufacturing electronic components, semiconductor and display fabrication units, ATMP units and specialised sub-assemblies, with a total scheme cost of about Rs 3,285 crore. It was the predecessor from which the India Semiconductor Mission drew lessons, teaching planners that small incentives attract component units but not fabs.
• US CHIPS and Science Act: The CHIPS and Science Act is a United States federal law signed in August 2022 that commits about $52.7 billion to domestic semiconductor research, development, manufacturing and workforce development, including $39 billion in manufacturing incentives plus a 25 per cent investment tax credit. Its goals are reshoring chip production, creating manufacturing jobs, and restricting China's access to advanced chips through accompanying export controls and funding guardrails.
• reshoring: Reshoring is the strategy of bringing the production of critical goods back onto domestic soil after decades of offshoring. In semiconductors it is the stated goal of the US CHIPS and Science Act and similar industrial policies worldwide, driven by the view that chips are strategic infrastructure whose supply must not depend on geopolitical rivals.
• export controls: Export controls are government restrictions on the sale or transfer of specified goods, software and technologies to designated destinations or end users. In the chip contest, the US Bureau of Industry and Security used them from October 2022 to cut China off from advanced computing chips and chipmaking equipment, making export controls the coercive twin of subsidy-led industrial policy.
• friend-shoring: Friend-shoring is the practice of locating sensitive production and supply chains in trusted partner countries rather than in geopolitical rivals or at home. For India, friend-shoring by Western and East Asian chip firms is an opportunity, positioning the country as a trusted alternative manufacturing base as supply chains realign away from China.
• rare earth elements: Rare earth elements are a group of seventeen chemically similar metals, including neodymium, dysprosium, terbium and yttrium, essential in small quantities for semiconductors, permanent magnets, lasers and displays. China dominates both mining and, more decisively, refining, and has used export licensing on these elements as geopolitical leverage, making them a strategic vulnerability for India's electronics ambitions.
• critical minerals: Critical minerals are minerals judged essential for economic and strategic industries and exposed to supply risk. India identified thirty of them in 2023, including lithium, cobalt, gallium and germanium, and launched a National Critical Mineral Mission to build domestic exploration, processing and recycling capacity, since import dependence on these minerals threatens the electric-vehicle, electronics and clean-energy transitions.
• Advanced Chemistry Cell (ACC): An Advanced Chemistry Cell is a modern high-energy-density battery cell, typically lithium-ion based, designed for electric vehicles and grid-scale energy storage. India's PLI scheme for ACC batteries, the National Programme on Advanced Chemistry Cell Battery Storage approved in May 2021 with an outlay of Rs 18,100 crore, targets 50 GWh of domestic cell manufacturing capacity to end dependence on imported cells.

Prelims practice

Test yourself with these prelims-style questions.